A problem in FPGA v1.4 results in
the MCII-e recording excessive control bus errors when trying to communicate
with the AIO-16, especially when the active controller is the one in the
default-standby slot (the right-hand controller in ADAM frames; the lower controller
in ADAM-M frames).
FPGA v1.5 fixes the control bus errors.
Version 1.4
With older versions of FPGA, a timing
violation when accessing the SRAM memory device could cause memory corruption.
This would typically result in a keypanel connected to port 7 or 15 to
stop responding, and display "****" on all keys. Because of the random nature
of the memory corruptions, other symptoms were also possible.
The timing problem only affects AIO-16 cards manufactured after August 2007.
FPGA version 1.4 fixes the timing violations and eliminates the memory
corruptions.